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Which is the reason for the drop in the dot clock. One the overall maximum, and another due to the available memory bandwidth of the chip. In general there are two factors determining the maximum dotclock. When the size of the mode used is less than the panel size, the default behaviour of the server is to stretch the mode in an attempt to fill the screen. In this way the expensive operation of reading back to contents of the screen is never performed and the performance is improved.

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Normally the colour transparency key for the overlay is the 8bpp lookup table entry Otherwise it has the the same properties as the It is enabled by default for machines since the blitter can not be used otherwise.

These option individually disable the features of the XAA acceleration code that the Chips and Technologies driver uses. For 24bpp on TFT screens, the technologkes assumes that a 24bit bus is being used.

For CRT’s you can also try to tweak the mode timings; try increasing the second horizontal value somewhat.

Chips and Technologies PCI BUS PCI BUS Win98 דרייבר הורד בחינם (ver. 6.­0.­0)

Note that the ” -bpp ” option has been removed and replaced with a ” -depth ” and ” -fbbpp ” option because of the confusion between the depth and number of bits per pixel used to represent to framebuffer and the pixmaps in the screens memory. In general the LCD panel clock should be set independently of the modelines supplied. This disables use of the hardware cursor provided by the chip. The x and WinGine chipsets are capable of technnologies depths of 16 or 24bpp.


The installer setup file may include a purely optional advertising offer which you are free to decline.

However careful use of this option might boost performance. However, some machines appear to have this feature incorrectly setup.

Chips and Technologies 65554 PCI BUS Drivers

Possibly useful if you wish to use an old workstation monitor. This can result in a reddish tint to 24bpp mode. Now the maximum memory clock is just the maximum supported by the video processor, not the maximum supported by the video memory.

The xx MMIO mode has been implemented entirely from the manual as I don’t have the hardware to test it on. This serial link allows an LCD screens to be located up to m from the video chjps.

This can be fixed by using the ” 18BitBus ” option. It is possible to force the server to identify a chipx chip with this option.

It also includes a fully programmable dot clock and supports all types of flat panels. The driver is capable of driving both a CRT and a flat panel display.

This chip is specially manufactured for Toshiba, and so documentation is not widely available. Hence you will see a line like. Display might be corrupted!!! The server will then allow the mode to occupy the whole x LCD. Also for non PCI machines specifying this force the linear base address to be this value, reprogramming the video processor to suit.


For the HiQV series of chips, the memory clock can be successfully probed. This option forces the LCD panel size to be overridden by the modeline display sizes. In fact the timing for the flat panel are dependent on the specification of the panel itself and are independent of the technologiess mode chosen. For this pcl the default behaviour of the server is to use the panel timings already installed in the chip.

Chips Technologies Pci Driver | softgiele

The effect of this is that the maximum dot technolkgies visible to the user is a half or a third of the value at 8bpp. If you are having driver-related problems that are not addressed by this document, or if you have found bugs in accelerated functions, you can try contacting the Xorg team the current driver maintainer can be reached at eich freedesktop. It is possible to turn the linear addressing off with this option. Most of the Chips and Technologies technollgies are supported by this driver to some degree.

The effect of this problem will be that the lower part of the screen will reside in the same memory as the frame accelerator and will therefore be corrupt.